Why Core Parking Locks Workloads to a Single CCD on a Ryzen PC

You might notice that a Ryzen processor with multiple Core Complex Dies runs a demanding application at lower performance than expected. The system appears to ignore half the cores, leaving them idle while one CCD handles the entire load. This behavior is caused by the Windows 11 core parking scheduler, which locks workloads to a single CCD under specific conditions. This article explains why the scheduler parks cores on other CCDs, how it affects performance, and what you can do to regain full multi-CCD performance.

Why Windows 11 Parks Cores on a Single CCD

Core parking is a power-management feature introduced in Windows 7 and refined in Windows 11. The scheduler marks selected logical processors as parked, meaning the operating system avoids scheduling threads on them. The goal is to reduce power consumption and heat by concentrating work on fewer cores, allowing the remaining cores to enter a deep idle state.

On a Ryzen processor with multiple CCDs, such as the Ryzen 9 7950X or 9950X, the scheduler applies core parking at the CCD level. Each CCD contains up to eight cores and its own 32 MB L3 cache. When a workload does not require all cores, the scheduler parks the entire second CCD. This keeps all threads on one CCD, which avoids the latency penalty of cross-CCD communication. Cross-CCD transfers go through the Infinity Fabric interconnect, which adds approximately 70–100 nanoseconds of latency compared to intra-CCD transfers.

The problem occurs when a workload is single-threaded or lightly threaded but demands sustained high performance. The scheduler sees low core utilization across both CCDs and parks the second CCD. Even when the workload ramps up, the scheduler may not immediately unpark the second CCD. The workload remains locked to the first CCD, causing performance to cap at the single-CCD throughput.

The Role of the CPPC2 Driver

Windows 11 uses the Collaborative Processor Performance Control version 2 driver to communicate with Ryzen processors. CPPC2 provides hints to the firmware about desired performance levels. When the scheduler parks a CCD, CPPC2 reduces the power budget for that CCD, making it even harder for the system to unpark it quickly. This interaction can cause a delay of several seconds before the second CCD becomes available, which is long enough to degrade performance in bursty workloads such as game level loads or compilation tasks.

Steps to Force All Cores Unparked on a Ryzen PC

If you want to prevent core parking from locking workloads to a single CCD, you can disable core parking in the active power plan. This keeps all cores available for scheduling, eliminating the cross-CCD lock. The following steps require an elevated Command Prompt.

1. Open Command Prompt as administrator
   Press the Windows key, type cmd, right-click Command Prompt in the search results, and select Run as administrator. Click Yes in the User Account Control prompt.
2. Identify the current active power plan GUID
   Type powercfg /getactivescheme and press Enter. The output shows a GUID in curly braces, such as {381b4222-f694-41f0-9685-ff5bb260df2e}. Copy this GUID for the next step.
3. Set the core parking index to zero
   Type the following command and press Enter:
   powercfg -setacvalueindex scheme_current sub_processor 0cc5b647-c1df-4637-891a-dec35c318583 0
   This sets the core parking performance overhead cap to zero, which effectively disables core parking.
4. Apply the change to the active power plan
   Type powercfg /setactive scheme_current and press Enter. This applies the modified settings immediately.
5. Verify core parking is disabled
   Type powercfg /query scheme_current sub_processor 0cc5b647-c1df-4637-891a-dec35c318583 and press Enter. The output should show AC Power Setting Index: 0x00000000.

After applying this change, restart the PC. Open Task Manager and go to the Performance tab. Under CPU, you should see all logical processors active even under light loads. Note that disabling core parking increases idle power consumption by 5–15 watts on a Ryzen 9 system, so consider reverting the change for battery-powered laptops.

If Core Parking Still Locks Workloads to One CCD

Workload Stays on CCD 0 Even After Disabling Core Parking

Disabling core parking via powercfg does not guarantee that the scheduler will distribute threads across CCDs. The scheduler also uses a NUMA-aware policy that prefers memory locality. If the application is not coded to allocate memory across multiple NUMA nodes, it may still run entirely on CCD 0. To force thread distribution, set the process affinity manually in Task Manager: right-click the process, select Set affinity, and clear the checkboxes for cores on CCD 0, leaving only cores on CCD 1 selected. This forces the process to run on the second CCD.

Performance Drop After Disabling Core Parking

Some users report lower benchmark scores after disabling core parking. This happens because the scheduler now allows threads to migrate between CCDs more freely, increasing cross-CCD latency. For workloads that benefit from cache locality, such as games with small working sets, keeping threads on one CCD is actually beneficial. If you see a performance drop, re-enable core parking by setting the index back to 100: powercfg -setacvalueindex scheme_current sub_processor 0cc5b647-c1df-4637-891a-dec35c318583 100 and apply the scheme again.

Core Parking Re-Enables After Windows Update

Windows 11 cumulative updates sometimes reset power plan settings to defaults. After a major update, verify the core parking index by running the query command from step 5. If the value has changed to 100, re-run the set command. To automate this, create a scheduled task that runs the powercfg command at system startup.

Core Parking Disabled vs Default: Performance and Power Comparison

Item	Core Parking Disabled	Default Core Parking
Core availability	All cores unparked at all times	Second CCD parked under light load
Single-threaded latency	Higher due to possible cross-CCD migration	Lower due to cache locality on one CCD
Multi-threaded throughput	Higher because all cores are immediately available	Lower until scheduler unparks second CCD
Idle power consumption	5–15 watts higher on Ryzen 9	Lower, second CCD enters deep sleep
Best use case	Rendering, compilation, video encoding	Gaming, office apps, web browsing

The core parking scheduler is a trade-off between power efficiency and multi-threaded responsiveness. For workloads that benefit from immediate access to all cores, disabling core parking removes the single-CCD lock. For workloads that are sensitive to cross-CCD latency, the default behavior is preferable. Use the powercfg command to toggle core parking based on the task at hand, and monitor performance with Task Manager or HWInfo to confirm the effect.